The A7 sports the same number of execution ports as Intel's Ivy Bridge chips and a reorder buffer equal to that found in the Haswell architecture, according to Anand Shimpi of AnandTech. Shimpi arrived at his conclusions by studying the A7 itself as well as Apple code commitments to the LLVM compiler project.
The number of execution ports is important because it defines how many instructions the processor can handle concurrently. Apple's A7 can process six instructions per clock cycle, the same as Intel's Ivy Bridge chips found in previous-generation Apple laptops and twice the capacity of the A6.
Similarly, a larger reorder buffer gives the processor a bigger pool of instructions to choose from when deciding how to most efficiently complete its tasks. The A7's 192-instruction buffer matches Intel's Haswell designs and is more than four times the A6's 45-instruction buffer.
Shimpi believes that the A7 was designed to be forward-looking, with room to increase performance as Apple moves to smaller fabrication processes. He also raised the possibility that Apple may choose to release yet another new architecture design with the A8, rather than simply refining the A7's "Cyclone" core.
As it stands, Shimpi added, most of the A7's processing power remains untapped due to battery life concerns. Current-generation iOS devices will run out of RAM, he predicts, long before reaching the A7's performance ceiling.
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